History of Espressif ESP32-S2

Last update Jan. 4^th 2021 1:41:53 PM

Creation date Sep. 20^th 2020 10:52:31 AM

• 
  Alexis on Jan. 4^th 2021 1:41:53 PMReport

  Height

  7 mm

  Width

  7 mm

• 
  Alexis on Jan. 4^th 2021 1:36:19 PMReport

  External Flash

  1 GB up to

• 
  Alexis on Sep. 20^th 2020 11:01:56 AMReport

  I²C

  yes up to 2

• 
  Freebie on Sep. 20^th 2020 10:52:48 AMReport

  Editor

  public

  Viewer

  public

• 
  Freebie on Sep. 20^th 2020 10:52:31 AMReport

  Mode

  70

  Name

  Espressif ESP32-S2

  Viewer

  unlisted

  Editor

  freebie-34ctult

  Category

  high-tech

  Release date

  2019

  Coprocessor

  ULP (RISC-V)

  ROM (Flash)

  128 KB

  RTC Memory

  16 KB

  External SRAM

  128 MB up to

  External Flash

  1 G up to

  ESP-MESH

  yes

  Touch sensors

  14

  SPI

  yes 4 (OSPI)

  I²C

  2

  I2S

  1

  UART

  2

  SDMMC

  no

  RMT (remote control)

  yes

  LCD Interface

  yes

  Camera Interface

  yes

  Secure flash

  4096-bit OTP secure boot

  Cryptography support

  AES-128/192/256, SHA-2, RSA, RNG, HMAC, Digital Signature

  Deep sleep consumption

  5 µA

  RAM

  320 KB

  CPU

  Tensilica Xtensa LX7
  32 bit Single-Core @ 240Mhz

  Wi-Fi

  yes 802.11b/g/n

  Bluetooth®

  no

  Ethernet (LAN, RJ45)

  no

  GPIO

  43

  USB Host

  yes

  Hall effect sensor

  no

  Temperature sensor

  yes

  PWM

  yes 8

  DAC

  yes 8 bit up to 2 channels

  ADC

  yes 12 bit SAR ADC up to 20 channels

  Short name

  ESP32-S2

  Website

  https://www.espressif.com/en/products/socs/esp32-s2