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History of
Espressif ESP32-S2
Last update
2021-01-04 13:41:53
Creation date
2020-09-20 10:52:31
Alexis
on 2021-01-04 13:41:53
Informe
Altura
7 mm
Ancho
7 mm
Alexis
on 2021-01-04 13:36:19
Informe
External Flash
1 GB up to
Alexis
on 2020-09-20 11:01:56
Informe
I²C
yes up to 2
Freebie
on 2020-09-20 10:52:48
Informe
Editor
public
Viewer
public
Freebie
on 2020-09-20 10:52:31
Informe
Mode
70
Nombre
Espressif ESP32-S2
Viewer
unlisted
Editor
freebie-34ctult
Category
high-tech
Fecha de lanzamiento
2019
Coprocessor
ULP (RISC-V)
ROM (Flash)
128 KB
RTC Memory
16 KB
External SRAM
128 MB up to
External Flash
1 G up to
ESP-MESH
yes
Touch sensors
14
SPI
yes 4 (OSPI)
I²C
2
I2S
1
UART
2
SDMMC
no
RMT (remote control)
yes
LCD Interface
yes
Camera Interface
yes
Secure flash
4096-bit OTP secure boot
Cryptography support
AES-128/192/256, SHA-2, RSA, RNG, HMAC, Digital Signature
Deep sleep consumption
5 µA
RAM
320 KB
CPU
Tensilica Xtensa LX7
32 bit Single-Core @ 240Mhz
Wi-Fi
yes 802.11b/g/n
Bluetooth®
no
Ethernet (LAN, RJ45)
no
GPIO
43
USB Host
yes
Sensor de efecto Hall
no
Capteur de température
yes
PWM
yes 8
DAC
yes 8 bit up to 2 channels
ADC
yes 12 bit SAR ADC up to 20 channels
Nombre corto
ESP32-S2
Sitio web
https://www.espressif.com/en/products/socs/esp32-s2
Go back to:
Espressif ESP32-S2